Patent · US Active

Low-leakage switch for sample and hold

US7812646B2 · kind B2 · utility

9Cited by

5References

14Claims

0Family size

Assignee

TEXAS INSTRUMENTS DEUTSCHLAND GMBH · DE

Inventors

Marcin Augustyniak · Regensburg, DE
Bernhard Wicht · Reutlingen, DE
Ingo Hehemann · Duisburg, DE

Key dates

Filing date	Oct 10, 2008
Grant date	Oct 12, 2010
Priority date	—
Expiry date	Dec 1, 2028

Classification

Technology area (CPC G)Physics
CPC primaryG11C27/026
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated electronic device includes a sample and hold stage. The sample and hold stage has a sampling capacitor (C) for an input voltage at an input node (Vin), a first switch (S1) coupled between the input node (Vin) and the sampling capacitor (C) for connecting the input node (Vin) to the sampling capacitor (C). There is also a voltage follower with an input coupled to the sampling capacitor (C). The first switch (S1) includes a first MOS transistor (NM1) coupled between the input node (Vin) and the sampling capacitor (C). The first MOS transistor has a bulk. The sample and hold stage is adapted to selectively couple the bulk to a node having a voltage level (V3) which is equal or close to the voltage level at the input node of the voltage follower.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.