Active matrix substrate where a portion of the storage capacitor wiring or the scanning signal line overlaps with the drain lead-out wiring connected to the drain electrode of a thin film transistor and display device having such an active matrix substrate
US7812893B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 20, 2005 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Sep 3, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136286
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An active matrix substrate suppresses reduction in production yield and increase in production steps and simultaneously permits both sufficient securing of a storage capacity and improvement of an aperture ratio of a pixel. The active matrix substrate is an active matrix substrate and includes a thin film transistor disposed at an intersection of a scanning signal line with a data signal line on a substrate, the thin film transistor including a gate electrode connected to the scanning signal line, a source electrode connected to the data signal line, and a drain electrode connected to a drain lead-out wiring; a storage capacitor upper electrode connected to the drain lead-out wiring and a pixel electrode; and a storage capacitor wiring overlapping with the storage capacitor upper electrode through an insulating film, wherein the storage capacitor wiring has an extending portion overlapping with the drain lead-out wiring through the insulating film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.