High-speed data sampler with input threshold adjustment
US7813460B2 · kind B2 · utility
87Cited by
22References
2Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 30, 2005 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Sep 11, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/063
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for sampling a high-speed digital signal include providing a data signal to a differential data input circuit, an offset control signal, and a strobe pulse. In response to the strobe pulse, the data signal is resolved into an output logic state based to a relatively greater extent on the differential data signal and to a relatively lesser extent on the offset control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.