Verification of memory consistency and transactional memory
US7814378B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2007 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Jan 17, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for efficiently verifying compliance with a memory consistency model includes a test module and an analysis module. The test module may coordinate an execution of a multithreaded test program on a test platform. If the test platform provides an indication of the order in which writes from multiple processing elements are performed at shared memory locations, the analysis module may use a first set of rules to verify that the results of the execution correspond to a valid ordering of events according to a memory consistency model. If the test platform does not provide an indication of write ordering, the analysis module may use a second set of rules to verify compliance with the memory consistency model. Further, a backtracking search may be performed to find a valid ordering if such ordering exists or show that none exists and, hence, confirm whether or not the results comply with the given memory consistency model.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.