Speculative multi-threading for instruction prefetch and/or trace pre-build
US7814469B2 · kind B2 · utility
8Cited by
7References
20Claims
0Family size
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Key dates
| Filing date | Apr 24, 2003 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Sep 4, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/433
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The latencies associated with retrieving instruction information for a main thread are decreased through the use of a simultaneous helper thread. The helper thread is a speculative prefetch thread to perform instruction prefetch and/or trace pre-build for the main thread.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.