Power semiconductor device
US7816706B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2008 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | Oct 7, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D18/60
Abstract
The power semiconductor device with a four-layer npnp structure can be turned-off via a gate electrode. The first base layer comprises a cathode base region adjacent to the cathode region and a gate base region adjacent to the gate electrode, but disposed at a distance from the cathode region. The gate base region has the same nominal doping density as the cathode base region in at least one first depth, the first depth being given as a perpendicular distance from the side of the cathode region, which is opposite the cathode metallization. The gate base region has a higher doping density than the cathode base region and/or the gate base region has a greater depth than the cathode base region in order to modulate the field in blocking state and to defocus generated holes from the cathode when driven into dynamic avalanche.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.