Nonvolatile memories with laterally recessed charge-trapping dielectric
US7816726B2 · kind B2 · utility
11Cited by
5References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2007 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | Sep 18, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
Abstract
Charge-trapping dielectric (160) in a nonvolatile memory cell is recessed from under the control gate's edge and/or from an edge of a substrate isolation region. The recessed geometry serves to reduce or eliminate charge trapping in regions from which the charge may be difficult to erase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.