Programmable cycle state machine interface
US7816943B2 · kind B2 · utility
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3References
14Claims
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Key dates
| Filing date | Jun 16, 2008 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | Jun 16, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/122
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A programmable cycle state machine interface to a microcontroller comprising a programmable cycle state machine, a first and second data bus, a first and second control output, and a control input for programming the cycle of the state machine. The programmable nature of the state machine allows for design and implementation changes without the need to redesign customized state machine logic on the microcontroller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.