Patent · US Active

Power-on reset circuit

US7816956B2 · kind B2 · utility

1Cited by

1References

19Claims

0Family size

Assignee

GWANGJU INSTITUTE OF SCIENCE AND TECHNOLOGY · KR

Inventors

Dong-Soo Har · Gwangju, KR
Yousaf Zafar · Gwangju, KR

Key dates

Filing date	Jul 30, 2008
Grant date	Oct 19, 2010
Priority date	—
Expiry date	Jul 30, 2028

Classification

Technology area (CPC G)Physics
CPC primaryG06F1/24
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A power-on reset circuit according to an embodiment of the present invention includes an input control unit configured to generate a default input signal in response to a power-on reset signal and a clock, a counting unit configured to perform a counting operation in response to the default input signal to generate a count offset signal, and a power-on reset unit configured to perform a counting operation in response to the count offset signal to generate the power-on reset signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.