Circuit device and method of measuring clock jitter
US7816960B2 · kind B2 · utility
7Cited by
25References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2007 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | Jan 28, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31709
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In an embodiment, a method is disclosed that includes receiving a clock signal at a delay chain of a circuit device and determining a value of the clock signal at a selected point within the delay chain. The method also includes adjusting the selected point when the value does not indicate detection of an edge of the clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.