ESD protection circuit for IC with separated power domains
US7817386B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2007 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | Feb 6, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
Abstract
An ESD protection circuit suitable for applying in an integrated circuit with separated power domains is provided. The circuit includes a P-type MOSFET coupled between a first circuit in a first power domain and a second circuit in a second power domain. A source terminal of the P-type MOSFET is coupled to a connection node for connecting the first circuit and the second circuit. A gate terminal of the P-type MOSFET is coupled to a positive power line of the second power domain. A drain terminal of the P-type MOSFET is coupled to a negative power line of the second power domain. A body terminal of the P-type MOSFET is also coupled to the connection node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.