Source and shadow wear-leveling method and apparatus
US7818492B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2007 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | Feb 25, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7211
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A flash memory system includes flash memory organized into a plurality of blocks of pages for storage of information, a page including data and spare, the blocks being identifiable, within the flash memory, by a physical address. The system further has a flash controller for communicating with a host and the flash memory and includes volatile memory for storing a source-shadow table of logical addresses identifying blocks addressable by the physical addresses. The source-shadow table has an address mapping table and a property value table. The property value table is used to store property values, each of which is associated with a block of a predetermined group of blocks and is indicative of the number of times a block has been written since the last erase operation performed thereon. The property values correspond to the logical addresses of the address mapping table, wherein a block having been written no more than two times is re-written to different areas of the flash memory without requiring an erase operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.