System and method for asynchronous clock regeneration
US7818528B2 · kind B2 · utility
20Cited by
3References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 19, 2006 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | Jan 21, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is a method of asynchronous clock regeneration. The method includes synchronizing a first write pointer and a second write pointer, the first write pointer being an offline write pointer, the second write pointer being an online write pointer. The method further includes swapping at least one bit from the first write pointer with at least one bit of the second write pointer when the bits are static. The method further includes regenerating a DQS (Data Strobe Signal) clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.