System information synchronization in a links-based multi-processor system
US7818560B2 · kind B2 · utility
2Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2007 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | May 7, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/4405
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Various embodiments described herein include one or more of systems, methods, firmware, and software to synchronize system information between processors during system boot in a links-based multi-processor system. Some embodiments synchronize data block by block through memory rather than piece by piece through registers by allowing a System Bootstrap Processor (“SBSP”) to directly access synchronization data in local memory of each of one or more Application Processors. These and other embodiments are described in greater detail below.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.