Capacitive decoupling method and module
US7818704B1 · kind B1 · utility
1Cited by
16References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 16, 2007 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | Nov 19, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09672
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present invention is directed to a capacitive decoupling module and method for an integrated circuit that features providing multiple capacitive elements to decouple the power rails from the integrated circuit. The multiple capacitive elements are spaced-apart, along a first direction, from the integrated circuit. A first set of capacitive elements is closer to the integrated circuit than a second set of capacitive elements. The first set has a smaller capacitance than the second set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.