Mapping communication in a parallel processing environment
US7818725B1 · kind B1 · utility
29Cited by
3References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2006 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | Jul 26, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17318
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An the integrated circuit comprises a plurality of processor cores interconnected by an interconnection network. A method for generating instructions to be executed in the integrated circuit comprises accepting a plurality of programs, at least some of the programs including one or more communication operations to communicate with other programs; mapping each program to one or more of the processor cores; determining correspondence among communication operations in the programs; and mapping communication for corresponding communication operations to resources associated with the interconnection network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.