Apparatus, system, and method for multiple-segment floating gate

US7821045B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Qiang Tang · Fremont, US
• Venkat Narayanan · San Diego, US

Key dates

• Filing date: Dec 28, 2006
• Grant date: Oct 26, 2010
• Expiry date: Jan 6, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/035

Abstract

Various embodiments include a substrate and a memory cell coupled to the substrate. The memory cell may include an L-shaped floating gate, a control gate, an insulation layer coupled between the control gate and the first L-shaped floating gate, and a conductive layer coupled between the substrate and the first L-shape floating gate. Other embodiments including additional apparatus, systems, and methods are disclosed.