Circuit structures and methods with BEOL layer(s) configured to block electromagnetic interference
US7821110B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 2007 |
| Grant date | Oct 26, 2010 |
| Priority date | — |
| Expiry date | Apr 29, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Back end of line (BEOL) circuit structures and methods are provided for blocking externally-originating or internally-originating electromagnetic interference. One such BEOL circuit structure includes one or more semiconductor substrates supporting one or more integrated circuits, and one or more BEOL layers disposed over the semiconductor substrate(s). At least one BEOL layer includes a conductive pattern defined at least partially by a plurality of elements arrayed in a first direction and a second direction throughout at least a portion thereof. The plurality of elements are sized and positioned in at least one of the first and second directions to block electromagnetic interference of a particular wavelength from passing therethrough. In one implementation, a first conductive pattern of a first BEOL layer polarizes electromagnetic interference, and a second conductive pattern of a second BEOL layer blocks the polarized electromagnetic interference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.