Data processing apparatus and data processing method
US7821919B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2004 |
| Grant date | Oct 26, 2010 |
| Priority date | — |
| Expiry date | Apr 12, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Each of memory bridges and I/O bridges, cross-linked to one another, is provided with an interface circuit section which performs data transmission and reception according to an PCI-Express interface. Each interface circuit section has a communication error processing section. When an error occurs in data received from the I/O bridge, the communication error processing section of the memory bridge cancels the received data and sends a communication error signal to the memory bridge. When receiving the communication error signal, the memory bridge stops receiving the data. Then, the communication error processing section of the memory bridge requests the I/O bridge to resend data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.