Logic circuit model conversion apparatus and method thereof; and logic circuit model conversion program
US7822591B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2006 |
| Grant date | Oct 26, 2010 |
| Priority date | — |
| Expiry date | Jul 22, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A logic circuit model conversion apparatus includes a first analysis unit which analyzes a model in which a logic circuit of a register transfer level has been coded and outputs simultaneous blocks and an analysis result, a creating unit which creates a common execution frequency group that is a set of codes whose execution frequency becomes common, based on the simultaneous blocks and analysis result, a second analysis unit which analyzes the common execution frequency group and creates a formula of a general term to derive a predetermined value of each register, a third analysis unit which analyzes a mutual relationship between the common execution frequency groups and derives an execution frequency of each common execution frequency group up to a predetermined time, and a deriving unit which derives a value of each of the registers at the predetermined time from the formula of the general term and execution frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.