Quiescing a manageability engine
US7822978B2 · kind B2 · utility
2Cited by
1References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2005 |
| Grant date | Oct 26, 2010 |
| Priority date | — |
| Expiry date | Jul 1, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1668
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the invention are generally directed to a methods, apparatuses, and systems for quiescing a processor bus agent. In one embodiment, a processor initiates the establishment of a protected domain for a computing system. A processor bus agent coupled with the processor is quiesed to reduce the potential for interference with the establishment of the protected domain. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.