Method of forming through-silicon vias
US7825024B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2008 |
| Grant date | Nov 2, 2010 |
| Priority date | — |
| Expiry date | Nov 25, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06541
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device having a through-silicon via (TSV) is provided. A semiconductor device is provided having a first dielectric layer formed thereon. One or more dielectric layers are formed over the first dielectric layer, such that each of the dielectric layers have a stacking structure, wherein the stacking structures in the one or more dielectric layers are vertically aligned. The stacking structures may be, for example, metal rings. The stacking structures are then removed to form a first recess. A second recess is formed by extending the first recess into the substrate. The second recess is filled with a conductive material to form the TSV.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.