Magnetoresistive memory elements with separate read and write current paths
US7825445B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 29, 2007 |
| Grant date | Nov 2, 2010 |
| Priority date | — |
| Expiry date | May 7, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A magnetoresistive memory element has a free layer, and a write current path aligned with a free layer plane. The memory element has a pinned layer with a magnetization direction aligned with that of the free layer. A barrier layer is disposed between the free layer and the pinned layer. The free, barrier and pinned layers together form a layer stack that has a read current path that extends through the layer stack and that is not aligned with the write current path in the free layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.