Minimizing power consumption of a reference voltage circuit using a capacitor
US7825639B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 2009 |
| Grant date | Nov 2, 2010 |
| Priority date | — |
| Expiry date | May 21, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/08
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A system and method is disclosed for minimizing power consumption in a reference voltage circuit. A capacitor is coupled to a reference voltage circuit and charged to a voltage that equals the reference voltage of the reference voltage circuit. The capacitor is then decoupled from the reference voltage circuit and power to the reference voltage circuit is turned off. The capacitor then provides the capacitor voltage to other circuits as a reference voltage. After a selected period of time has elapsed since the capacitor was last charged to the reference voltage, the reference voltage circuit is turned on and the capacitor is again coupled to the reference voltage circuit. The reference voltage circuit then recharges the capacitor to the reference voltage level. This process is repeated to periodically charge the capacitor to the reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.