Digital sigma-delta modulators
US7825842B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2008 |
| Grant date | Nov 2, 2010 |
| Priority date | — |
| Expiry date | May 25, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/3028
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital sigma-delta modulator (100) for modulating a digital input signal (x) is described. The digital sigma-delta modulator (100) comprises a quantizer (115) for quantizing an input signal (s) and producing a quantized output signal (y) at a first output (110) and an error output signal (−q) at a second output (165), at least one feedback loop (120, 125) connected to an input adder (140) and the first outputs (110) and the second output (165) of the quantizer (115) and a feedback filter (130, 135) in the at least one feedback loop (120, 125). The input adder (140) produces the sum signal (s) by adding the digital input signal (x) at an input (105) and output signals of the at least one feedback loop filters (130,135).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.