Sense amplifier circuit and method for semiconductor memories with reduced current consumption
US7826284B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2007 |
| Grant date | Nov 2, 2010 |
| Priority date | — |
| Expiry date | Nov 27, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sensing circuit for a semiconductor memory, includes, a detecting amplifier including a first circuital branch is run through by a first current corresponding to the sum of a second current as a function of a comparison current and a cell current. The cell current is a function of a state of a memory cell to be read in a predetermined biasing condition. A second circuital branch is coupled as a current mirror configuration with the first circuital branch. The second circuital branch is run through by a third current proportional to the first current. A third circuital branch coupled to the second branch sinks a fourth current as a function of the comparison current. A fourth circuital branch coupled to is run through by a residual current equal to the difference between the third and the fourth current. The residual current assumes different values depending on the fact that the cell current is lower, equal or higher than the comparison current. A residual current sensitive means generates an indication of the state of the memory cell as a function of a value of the residual current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.