Dynamic clock control circuit and method
US7827424B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 29, 2004 |
| Grant date | Nov 2, 2010 |
| Priority date | — |
| Expiry date | Feb 28, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A variable clock control information generator receives vertical blank interval information corresponding to a vertical blank interval (VBI) during display rasterization. The vertical blank interval is a period of time in a video display signal that temporarily suspends transmission of video data as is known during display rasterization, to allow a display to return back up to (retrace) the first line of the display after scanning the end of the display. In response to the received vertical blank interval information, the variable clock control information generator produces memory clock control information to change the frequency of a memory clock divider signal during the detected vertical blank interval.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.