Patent · US Active

Phase locked loop, voltage controlled oscillator, and phase-frequency detector

US7830212B2 · kind B2 · utility

32Cited by
0References
13Claims
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Key dates

Filing dateJun 24, 2008
Grant dateNov 9, 2010
Priority date
Expiry dateJul 3, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03L7/191
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A phase locked loop, voltage controlled oscillator, and phase-frequency detector are provided. The phase locked loop comprises a phase-frequency detector (PFD), a loop filter (LF), a voltage controlled oscillator (VCO), and a 3-stage frequency divider. The PFD receives a reference signal and a feedback signal to determine phase and frequency errors. The LF), coupled to the phase-frequency detector, filters the phase and frequency errors to generate a control voltage. The VCO, coupled to the loop filter, generates a VCO output signal according to the control voltage. The 3-stage frequency divider, coupled to the voltage controlled oscillator, divides the frequency of the VCO output signal 3 times to generate the feedback signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.