Patent · US Active

Dual processor accelerated graphics rendering

US7830389B2 · kind B2 · utility

10Cited by
8References
18Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 3, 2006
Grant dateNov 9, 2010
Priority date
Expiry dateSep 7, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F3/1438
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Dual processor accelerated graphics rendering is a method which allows for optimizing graphics performance using two processors and 3D hardware accelerators. This method allows for real time embedded systems to have multiple partitions to render to multiple windows with non-blocking graphics calls. One processor queues up graphics calls within a discrete time because they do not interface with the graphics accelerator hardware. The second processor supports the hardware accelerator with drivers operating in a single partition. This design abstracts the graphics calls from the native interface of the graphics hardware accelerator.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.