Light emitting diode having vertical topology and method of making the same
US7834374B2 · kind B2 · utility
5Cited by
9References
33Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Feb 20, 2007 |
| Grant date | Nov 16, 2010 |
| Priority date | — |
| Expiry date | Nov 2, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/872
Abstract
An LED having vertical topology and a method of making the same is capable of improving a luminous efficiency and reliability, and is also capable of achieving mass productivity. The method includes forming a semiconductor layer on a substrate; forming a first electrode on the semiconductor layer; forming a supporting layer on the first electrode; generating an acoustic stress wave at the interface between the substrate and semiconductor layer, thereby separating the substrate from the semiconductor layer; and forming a second electrode on the semiconductor layer exposed by the separation of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.