Cost-reduced redundant service processor configuration
US7836335B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2008 |
| Grant date | Nov 16, 2010 |
| Priority date | — |
| Expiry date | May 13, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/2035
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A redundant service processor configuration is provided. A first processor in a first node operates elements in the first node. A first control line connects the first processor to a first multiplexer in the first node. A second processor in a second node operates elements in the second node. A second control line connects the second processor to a second multiplexer in the second node. The first control line from the first processor connects to the second multiplexer. The second control line from the second processor connects to the first multiplexer. In response to a failure of the second processor, the first processor operates the first multiplexer to initialize the elements of the first node, the second processor is switched off, and the first processor operates the second multiplexer to initialize the elements of the second node. Analogous operations occur in response to a failure of the first processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.