System, method and apparatus for optimizing multiple wire pitches in integrated circuit design
US7836422B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 15, 2008 |
| Grant date | Nov 16, 2010 |
| Priority date | — |
| Expiry date | May 16, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/394
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for routing wires in an integrated circuit includes defining an even number n of initial width routing tracks in a selected routing channel. The n initial routing tracks are separated by a substantially equal first separation distance from the other routing tracks, Vss and Vdd in the routing channel. The n initial width routing tracks and the first separation distance have an initial width about equal to the minimum design width. An odd number of routing tracks less than n are then selected, the odd number of routing tracks have a second pitch greater than the first pitch, assigning the odd number of routing tracks in the routing channel. A third routing pitch can be defined that is wider than the second routing pitch for alternating routing tracks at the odd number of routing tracks if needed. A wire routing system in an integrated circuit is also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.