Local clock buffer (LCB) with asymmetric inductive peaking
US7839175B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 4, 2008 |
| Grant date | Nov 23, 2010 |
| Priority date | — |
| Expiry date | Aug 4, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0963
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A Local Clock Buffer (LCB), an IC chip including registers, some of which may include master/slave latches, locally clocked by the LCB, e.g., providing a launch clock and a capture clock each with an identified critical edge. The LCB includes asymmetrically inductively peaked series connected logic gates (e.g., inverters and/or NAND gates), each with an inductor between gate devices and supply (Vdd) or ground. The series connected gates alternate between having the inductor located between gate devices and the supply and located between gate devices and ground, providing asymmetric inductive peaking to maintain the sharpness of the critical edges. Optionally, corresponding logic gates in multiple LCBs may share the same inductor. Asymmetric inductive peaking allows reducing LCB power without degrading performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.