Nonvolatile semiconductor memory
US7839679B2 · kind B2 · utility
4Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2008 |
| Grant date | Nov 23, 2010 |
| Priority date | — |
| Expiry date | Jul 25, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile semiconductor memory according to an aspect of the invention includes memory cell arrays including plural cell units, a power supply pad disposed on one end in a first direction of the memory cell arrays, and page buffers disposed in the first direction of the memory cell arrays. The nonvolatile semiconductor memory also includes plural bit lines which are disposed on the memory cell arrays while extending in the first direction and a first power supply line which is disposed on the plural bit lines on the memory cell arrays to connect the power supply pad and the page buffers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.