Fuses for memory repair
US7839707B2 · kind B2 · utility
39Cited by
11References
26Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 9, 2008 |
| Grant date | Nov 23, 2010 |
| Priority date | — |
| Expiry date | Jan 16, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2229/763
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Structures for fuses to control repair of multiple memories embedded on an integrated circuit are provided along with methods of use. A set of fuses is shared to control repair of a plurality of memories. Some of the fuses are associated with a memory to be repaired. Others of the fuses identify how the repair is accomplished.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.