Method and system for high speed options pricing
US7840482B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2007 |
| Grant date | Nov 23, 2010 |
| Priority date | — |
| Expiry date | Mar 23, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06Q40/06
- WIPO fieldIT methods for management
- WIPO sectorElectrical engineering
Abstract
A high speed technique for options pricing in the financial industry is disclosed that can provide both high throughput and low latency. A parallel/pipelined architecture is disclosed for computing an implied volatility in connection with an option. Parallel/pipelined architectures are also disclosed for computing an option's theoretical fair price. Preferably these parallel/pipelined architectures are deployed in hardware, and more preferably reconfigurable logic such as Field Programmable Gate Arrays (FPGAs) to accelerate the options pricing operations relative to conventional software-based options pricing operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.