Display power management
US7840827B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2006 |
| Grant date | Nov 23, 2010 |
| Priority date | — |
| Expiry date | Jun 23, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for power management of a display system. A display controller couples to a memory storage device. A frame buffer in the memory storage device is filled with frames of information for display on a display device. The frames of information transfer to a display buffer in the display controller. The display controller transmits the frames of information from the display buffer to the display device. When frame information is not being transferred to the display controller, the display controller and the memory storage device may separately enter a power saving state. In power saving state, the display controller may continue to transmit frame information to the display device; however, power and a clock signal to components of display controller may be limited. When the display buffer is almost empty, the display controller exits power saving state to fill the display buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.