Differential amplifier with accurate input offset voltage
US7843264B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2008 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Jun 22, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45628
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier with accurate input offset voltage is described. In one design, the amplifier includes first and second unbalanced differential pairs. The first unbalanced differential pair receives a differential input signal and provides a first differential current signal. The second unbalanced differential pair receives a differential reference signal and provides a second differential current signal, which is subtracted from the first differential current signal to obtain a differential output signal. The second differential current signal tracks an error current in the first differential current signal so that the differential output signal is zero when the differential input signal is equal to a target input offset voltage for the amplifier. For each unbalanced differential pair, one transistor is M times the size of the other transistor, with M being selected to obtain the target input offset voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.