Patent · US Active

Integrated circuit including memory refreshed based on temperature

US7843753B2 · kind B2 · utility

3Cited by

11References

20Claims

0Family size

Assignee

Qimonda AG · DE

Inventors

Peter Mayer · Basel, CH
Nicholas Heath · Apex, US
Rom-Shen Kao · Durham, US
Jason D. Parrish · Durham, US

Key dates

Filing date	Mar 19, 2008
Grant date	Nov 30, 2010
Priority date	—
Expiry date	Nov 5, 2028

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/40626
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated circuit includes an array of memory cells and a first circuit. The array includes word lines. Each word line is coupled to a plurality of memory cells. The first circuit is configured to refresh memory cells along a first number of word lines in response to a refresh command. The first number of word lines is based on a sensed temperature.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.