Method and apparatus for clock skew calibration in a clock and data recovery system using multiphase sampling
US7844021B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2006 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Aug 29, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/046
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are provided for clock skew calibration in a clock and data recovery system. One aspect of the invention compensates for skew among a plurality of clocks in a clock and data recovery system. The clocks are applied to a plurality of latches to sample an incoming signal. A reference signal, such as a Nyquist signal, is applied to a data input of each of the latches. Statistics of “early” and “late” corrections applied to at least one of the clocks by a bang-bang phase detector in the clock and data recovery system are evaluated and a delay of a clock buffer associated with the at least one clock is adjusted to obtain approximately a 50% early-to-late ratio for the at least one clock. The clock and data recovery system ensures that the early-to-late ratio for the sum of the plurality of clocks is approximately 50%.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.