Logical structure layout identification and classification for offline character recognition
US7844114B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2005 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Aug 26, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06V30/287
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for implementing character recognition is described herein. An input character is received. The input character is composed of one or more logical structures in a particular layout. The layout of the one or more logical structures is identified. One or more of a plurality of classifiers are selected based on the layout of the one or more logical structures in the input character. The entire character is input into the selected classifiers. The selected classifiers classify the logical structures. The outputs from the selected classifiers are then combined to form an output character vector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.