System and method for recovery from memory errors in a medical device
US7844337B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2007 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Nov 9, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system comprising an implantable medical device that comprises at least one electrical input to receive sensed electrical activity of a heart of a patient, a memory, and a controller circuit. The controller circuit is coupled to the electrical input and memory and is operable to enter a memory scrubbing mode that increases a rate of detecting and correcting single bit errors in the memory when the controller circuit determines the implantable device is in a high-energy radiation environment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.