Parallel interface bus to communicate video data encoded for serial data links
US7844762B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2007 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Jun 13, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/85
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In some embodiments, a device includes a bus, a parallel source, and a parallel sink. The parallel source is to provide parallel groups of signals including video signals to the bus, wherein the bus has a number of lanes that is fewer than a number of signals used to represent a pixel such that pixels are represented in more than one of the parallel groups. The parallel sink is to receive the parallel groups of signals from the bus, wherein the parallel sink includes a signal extractor to separate at least a portion of the groups of signals into multiple channels, and encoder and serializer circuits to encode and serialize the separated signals. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.