Portable processing device having a modem selectively coupled to a RISC core or a CISC core
US7844805B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 6, 2007 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Sep 11, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor for a portable electronic device. The processor includes a RISC (reduced instruction set computing) core a CISC (complex instruction set computing) core, a video accelerator circuit and an audio accelerator circuit. Each of the video and audio accelerator circuits are coupled to both the RISC and CISC cores, with both cores and both accelerator circuit being incorporated into a single integrated circuit. In a first plurality of operational modes, the RISC core is active, while the CISC core is in one of a sleep state or a power off state. In a second plurality of modes, both the RISC and CISC cores are active.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.