Programmable test clock generation responsive to clock signal characterization
US7844875B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2008 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Oct 25, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31922
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A clock signal within an application-specific integrated circuit (ASIC) is characterized while operating a subsystem. Subsequently, also on the ASIC, a testing clock signal is generated, based on the characterization of the operative clock signal, for purposes of testing the subsystem operating according to the testing clock signal instead of the clock signal. The ASIC includes a clock signal characterization circuit configured to characterize a clock signal within the ASIC; a programmable testing clock signal generator configured for being programmed based on said characterization of the clock signal, and for generating a test clock signal based on its said programming; and the subsystem tested when operating according to the testing clock signal instead of the clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.