Method and device for multi phase error-correction
US7844877B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2006 |
| Grant date | Nov 30, 2010 |
| Priority date | — |
| Expiry date | Sep 30, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/6362
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Data bits to be encoded are split into a plurality of subgroups. Each subgroup is encoded separately to generate a corresponding codeword. Selected subsets are removed from the corresponding codewords, leaving behind shortened codewords, and are many-to-one transformed to condensed bits. The final codeword is a combination of the shortened codewords and the condensed bits. A representation of the final codeword is decoded by being partitioned to a selected subset and a plurality of remaining subsets. Each remaining subset is decoded separately. If one of the decodings fails, the remaining subset whose decoding failed is decoded at least in part according to the selected subset. If the encoding and decoding are systematic then the selected subsets are of parity bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.