Patent · US Active

FB DRAM memory with state memory

US7848134B2 · kind B2 · utility

0Cited by

5References

24Claims

0Family size

Assignee

Qimonda AG · DE

Inventors

Milena Ivanov · Unterhaching, DE
Heinz Hoenigschmid · Starnberg, DE
Stefan Dietrich · Potsdam, DE
Michael Markert · Augsburg, DE

Key dates

Filing date	Jul 23, 2008
Grant date	Dec 7, 2010
Priority date	—
Expiry date	Jan 30, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG11C2211/4016
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A memory chip with a plurality of FB DRAM cells, having a word line coupled to a first FB DRAM cell and a second FB DRAM cell is disclosed. The memory chip further has a first bit line coupled to the first FB DRAM cell, and a first state memory circuit coupled to the first bit line. The memory chip further includes a second bit line coupled to the second FB DRAM cell, and a second state memory circuit coupled to the second bit line. The memory chip further includes a sense amplifier, which can be coupled to the first FB DRAM cell, the second FB DRAM cell, the first state memory circuit or the second state memory circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.