Time division multiplexed communication bus and related methods
US7848232B2 · kind B2 · utility
6Cited by
8References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2006 |
| Grant date | Dec 7, 2010 |
| Priority date | — |
| Expiry date | Sep 26, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L5/1492
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A time division multiplexed communication bus is disclosed that provides a low latency, low pin count solution for communications among information handling systems. The time division multiplexed serial bus is advantageous in providing communications among modular computing systems, passthrough modules and chassis management controllers, as part of a modular computing system chassis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.