Decoupled header and packet processing in IPSEC
US7848325B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 8, 2006 |
| Grant date | Dec 7, 2010 |
| Priority date | — |
| Expiry date | Feb 2, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L63/164
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An IPsec processor for performing IPsec processing of traffic packets is disclosed. The IPsec processor comprises a network processing module (500) and a hardware co-processing module (502) coupled to the network processing module (500) via an interface, the co-processing module (500) comprising a policy check processor (525), and a packet transform processor (526). The network processing module (500) is adapted for communicating a part of a packet to the policy check processor (525) via the interface, and if IPsec processing of the packet is required, communicating the packet to the packet transform processor (526) via the interface, and scheduling the IPsec processed said packet, received from the packet transform processor (526) via the interface, for forwarding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.