Patent · US Active

Method for managing operability of on-chip debug capability

US7849315B2 · kind B2 · utility

13Cited by
8References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 22, 2006
Grant dateDec 7, 2010
Priority date
Expiry dateOct 7, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/31705
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A method for managing operability of an on-chip debug capability (24) in a product (26) configured to execute software (30) includes storing (74, 76) a debug public key (40) and an operational public key (44) in product memory (54). The software (30) with either a debug signature (82) or an operational signature (88) is saved (84) in the memory (56). When enablement indication is received, the debug signature (82) is validated (102) using the debug public key (40). The debug capability (24) is enabled upon validation of the signature (82) and the software (30) is allowed to execute. When disablement indication is received, the operational signature (88) is verified (112) using the operational public key (44). The on-chip debug capability (24) is disabled upon verification of the signature (88) and the software (30) is allowed to execute.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.